1. Field of the Invention
The present invention relates to an amplifying circuit, and in particular, relates to an amplifying circuit that is suited to the driving of a capacitive load.
2. Description of the Related Art
Plural chips, that incorporate therein numerous amplifying circuits for supplying voltage for image writing to the individual cells of a display device, are provided at a driving circuit that drives a display device such as a liquid crystal display (LCD), an organic EL display, or the like. However, as display devices become larger and the levels of the performances required thereof become higher, it is demanded that the amplifying circuits be small-sized and be able to drive the display device, that is a large capacitive load, at a high slew rate and by consuming little electric power. Further, depending on the number of cells (the number of pixels) in the display device that is the object of driving, there are cases in which some of the amplifying circuits within the chips are not connected to the display device and are disposed in a no-load state. Accordingly, it is also required of the amplifying circuits that they not oscillate also in a no-load state. Moreover, the loads connected to the individual amplifying circuits at the time of inspecting and evaluating the chips are lower than at the time of connection to the display device. Accordingly, the amplifying circuits must not oscillate also in the light-load state at the time of inspecting and evaluating the chips, or the like. Suppressing oscillation can be realized by enlarging the capacitors for phase compensation provided at the amplifying circuits. However, this leads to a deterioration in the slew rate and increased size.
In relation thereto, Japanese Patent Application Laid-Open (JP-A) No. 10-270956 (document 1) discloses a phase compensating circuit. This phase compensating circuit has a buffer amplifier that receives the signal of the output stage of an operational amplifier that has an input stage and an output stage. The circuit is structured such that one end of a capacitor for phase compensation is connected to the output of the buffer amplifier, and the other end is connected to the input of the output stage.
Further, JP-A No. 02-303204 (document 2) discloses a structure that is provided with a first phase compensating stage formed from a capacitor CC and transistors M7, M8, and a second phase compensating stage formed from a capacitor CC′ and transistors M10 through M13, as phase compensating stages that are connected to a differential input stage and an output amplifying stage.
Moreover, JP-A No. 2005-341018 (document 3) discloses a driving circuit. The driving circuit includes: an operational amplifier that amplifies an input signal and outputs it to a capacitive load; an operating state detecting circuit detecting the operating state of the operational amplifier with respect to the capacitive load; and a variable resistor that is connected to the output of the operational amplifier and that varies the resistance value in accordance with the operating state detected by the operating state detecting circuit.
The technique of document 1 has the advantage that the stability of the operational amplifier with respect to oscillation can be improved by providing a capacitor for phase compensation and a buffer amplifier. However, the output stage is a structure that carries out class A amplification by a single transistor, and the voltage range (effective operating range) over which amplification is carried out on the input signal is narrow. Therefore, this technique is not suited to applications such as driving a display device or the like.
Further, the technique of document 2 can broaden the voltage range in which phase compensating stages function, by providing plural phase compensating stages that are formed from capacitors and transistors. However, in the same way as the technique of document 1, the output stage is a structure that carries out class A amplification by a single transistor, and the effective operating range is narrow. Therefore, this technique is not suited to applications such as driving a display device or the like.
The techniques of documents 1 and 2 can improve stability (make it difficult for the amplifying circuits to oscillate) by making the capacity for phase compensation large. However, generally, the slew rate of an amplifying circuit is proportional to the current of the input amplifying stage (differential stage) of the amplifying circuit (nearly equal to the consumed current of the amplifying circuit) and is inversely proportional to the capacity for phase compensation. Accordingly, if the capacity for phase compensation is made to be large, another problem arises in that the slew rate decreases.
The technique of document 3 requires providing an operating state detecting circuit and a variable resistor. Accordingly, the structure of the amplifying circuit becomes complex and the amount of electric power that is consumed increases. Further, in the technique of document 3, there are cases in which through-current flows through the amplifying circuit. Accordingly, the generation of heat and the like are brought about by this through-current. Through-current will be explained hereinafter.
FIG. 4 illustrates a portion of the driving circuit of document 3, which portion relates to the generating of through-current. In the driving circuit of document 3, a P-type transistor MP0 and an N-type transistor MN0 that operate as a push-pull circuit are provided respectively at the output stage. Further, output end OUT of the output stage is connected to capacitive load CL. Gate pgate of the P-type transistor MP0 and gate ngate of the N-type transistor MN0 are respectively connected to the output end OUT of the output stage via phase compensating capacitors Cc. As shown in FIG. 4 as well, the driving circuit of document 3 basically carries out phase compensation by utilizing the mirror effect.
In this structure, when the input signal voltage to the input amplifying stage rises by a large amplitude from low level to high level, the voltage outputted from the input amplifying stage to the gate pgate decreases, the P-type transistor MP0 turns on, and current that charges the capacitive load CL flows from power supply VDD. At this time, the voltage of the output end OUT increases suddenly. However, because the output end OUT is also connected to the gate ngate via the phase compensating capacitor Cc, the voltage of the gate ngate rises due to the coupling of the phase compensating capacitor Cc (the capacitor works to attempt to make the potential difference of the both ends small), and the N-type transistor MN0 turns on. Due thereto, through-current flows from the power supply through the P-type transistor MP0 and the N-type transistor MN0. The time over which the through-current flows is extremely short. However, several hundred amplifying circuits are provided at the driving circuit of a display device. Accordingly, heat generation that cannot be ignored is brought about due to through-current flowing through the individual amplifying circuits.